CD4017B CD4017 CMOS Decade Counter with 10 Decoded Outputs CD4017 US Seller

Description

CD4017B CD4017BE CMOS Decade Counter with 10 Decoded Outputs
Description
CD4017B  5-stage Johnson counters having 10 decoded output. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise and fall times.
These counters are advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT siganl is high. A high RESET signal clears the counter to its zero count. Use of the Johnson counter configuration permits high-speed operation, 2-input decode-gating and spike-free decoded outputs. Anti-lock gating is provided, thus assuring proper counting sequence. The decoded output are normally low and go high only at their respective decoded time slot. Each decoded output remains high for one full clock cycle. A CARRY-OUT signal completes on cycle every 10 clock input cycles in the CD4017B and is used to ripple-clock the succeeding device in a multi-device counting chain.
The CD4017B in 16-lead dual-in-line plastic package (E suffix),
Features
Fully static operation
Medium speed operation…10 MHz (typ.) at V
DD
= 10 V
Standardized, symmetrical output characteristics
100% tested for quiescent current at 20 V
5-V, 10-V, and 15-V parametric ratings
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
Applications:
Decade counter/decimal decode display (CD4017B)
Binary counter/decoder
Frequency division
Counter control/timers
Divde-by-N counting
DATASHEET PDF
TERMS OF SALE
We welcome FPO/APO/Military Orders.
APO/FPO ships at domestic rates.
New Bidders, International bidders welcome - we are flexible on customs declarations.
Any questions eoi at lunaticlabs.biz
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