CD4001BE CMOS Quad 2-Input NOR Gate DIP14

Description

CD4001BE CMOS Quad 2-Input NOR Gate DIP14
NOR gates provide the system designer with direct implementation of the NOR function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.
Features
Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V
Buffered inputs and outputs
Standardized symmetrical output characteristics
100 Percent  tested for maximum quiescent current at 20 V
Maximum input current of 1 microA at 18 V over full package-temperature range; 100 nA at 18 V and 25C
5-V, 10-V, and 15-V parametric ratings
Noise margin (over full package temperature range):
1 V at VDD = 5 V
2 V at VDD = 10 V
2.5 V at VDD = 15 V
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
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