6 Vatics H.264 Encoder SoC with Integrated Fisheye Correction and DDR Function

Description

This is a new lot of 6 Vatics H.264 Encoder SoC with Integrated Fisheye Correction and DDR Function
M
3
C
SiP
S
e
ri
e
s
H
.
264
E
n
c
oder
SoC
w
i
th
I
nteg
r
ated
F
i
sheye
C
o
rr
e
c
t
i
on
and
DDR
F
un
c
t
i
on
M
ode
ls
M
3851C
M
3881C
M
3882C
H
o
s
t
C
on
t
ro
ll
e
r
A
RM926
E
J
™
600MHz
Vi
de
o
C
ompre
ss
i
o
n
H.
264
P
ro
f
ile
H
.
264
/
M
PE
G
-
4
A
V
C
(
I
S
O
/
I
E
C
14496
-
10)
bas
e
lin
e
,
m
ain,
and
hi
g
h
p
r
o
f
il
e
@L
e
v
e
l
4
.
1
H.
264
P
er
f
orm
a
nc
e
1080p
@
30
f
ps
+
D
1
@
30
f
ps
H.
264
RO
I
Encod
i
n
g
Up
t
o
8
ind
e
p
e
nd
e
nt
R
O
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w
indo
w
s.
Suppo
r
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di
ff
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and
f
r
a
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e
in
e
a
c
h
R
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H.
264
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C
-
T
Encod
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o
4
la
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er
s
M
J
P
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er
f
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nc
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30
f
ps
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de
o
I
npu
t
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/F
Bay
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Up
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w
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12
-
bit
c
hann
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MIP
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Up
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one
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lane
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hann
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BT
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1120
Up
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one
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hann
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l
BT
.
656
Up
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w
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(
in
c
luding
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MU
X-
4
c
hann
e
l)
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t
w
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c
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de
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u
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8
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it
BT
.
656
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r
t
16
-b
it
BT
.
1120
Suppo
r
t
R
GB
888
Suppo
r
t
sR
GB
(i80
-
50
MP
)
Suppo
r
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VBS
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m
age
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w
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Fi
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12
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8
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abl
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w
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c
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audio
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w
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(m
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ff
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put
up
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500
m
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Full
dupl
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Sin
g
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c
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2
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1
Embedde
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DR
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128MB
DD
R3
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800
S
D
R
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M
256MB
DD
R3
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800
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D
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M
US
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USB
2
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1
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t
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10
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100
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(
suppo
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,
RM
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,
and
3
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3V
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)
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/
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and
x
1
RS485,
or
x
1
f
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f
un
c
t
ion
A
D
C
x
4,
10
-
bit
re
solu
t
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3
R
TC
x
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(
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@
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PI
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Up
t
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96
bi
t
s
(
16
d
e
di
c
a
te
d
pins)
PW
M
x
8
X
TAL
12MHz
(f
or
s
y
s
te
m
)
and
32
.
768
K
Hz
(f
or
R
TC
)
C
l
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G
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at
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4
c
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f
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c
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per
ati
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C
o
re
:
1
.
2V
I
/
O
:
1
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5V
(f
or
DD
R3)
and
3
.
3V
P
a
c
k
age
T
FB
GA
361
(
19
x
19)
Ball
P
i
t
c
h:
0
.
65
m
m
D
i
m
e
nsion:
13
m
m
x
13
m
m
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